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LMZ14201
www.ti.com
SNVS649F – JANUARY 2010 – REVISED OCTOBER 2013
For V O = 0.8V the FB pin can be connected to the output directly so long as an output preload resistor remains
that draws more than 20uA. Converter operation requires this minimum load to create a small inductor ripple
current and maintain proper regulation when no load is present.
A feed-forward capacitor is placed in parallel with R FBT to improve load step transient response. Its value is
usually determined experimentally by load stepping between DCM and CCM conduction modes and adjusting for
best transient response and minimum output ripple.
A table of values for R FBT , R FBB , C FF and R ON is included in the applications schematic.
SOFT-START CAPACITOR SELECTION
Programmable soft-start permits the regulator to slowly ramp to its steady state operating point after being
enabled, thereby reducing current inrush from the input supply and slowing the output voltage rise-time to
prevent overshoot.
Upon turn-on, after all UVLO conditions have been passed, an internal 8uA current source begins charging the
external soft-start capacitor. The soft-start time duration to reach steady state operation is given by the formula:
t SS = V REF * C SS / Iss = 0.8V * C SS / 8uA
This equation can be rearranged as follows:
C SS = t SS * 8 μ A / 0.8V
(4)
(5)
Use of a 0.022 μ F results in 2.2 msec soft-start interval which is recommended as a minimum value.
As the soft-start input exceeds 0.8V the output of the power stage will be in regulation. The soft-start capacitor
continues charging until it reaches approximately 3.8V on the SS pin. Voltage levels between 0.8V and 3.8V
have no effect on other circuit operation. Note that the following conditions will reset the soft-start capacitor by
discharging the SS input to ground with an internal 200 μ A current sink.
?
?
?
?
The enable input being “pulled low”
Thermal shutdown condition
Over-current fault
Internal Vcc UVLO (Approximately 4V input to V IN )
C O SELECTION
None of the required C O output capacitance is contained within the module. At a minimum, the output capacitor
must meet the worst case minimum ripple current rating of 0.5 * I LR P-P , as calculated in Equation 19 below.
Beyond that, additional capacitance will reduce output ripple so long as the ESR is low enough to permit it. A
minimum value of 10 μ F is generally required. Experimentation will be required if attempting to operate with a
minimum value. Ceramic capacitors or other low ESR types are recommended. See AN-2024 for more detail.
Equation 6 provides a good first pass approximation of C O for load transient requirements:
C O ≥ I STEP *V FB *L*V IN / (4*V O *(V IN —V O )*V OUT-TRAN )
Solving:
C O ≥ 1A*0.8V*10 μ H*24V / (4*3.3V*( 24V — 3.3V)*33mV) ≥ 21.3 μ F
(6)
(7)
The LMZ14201 demonstration and evaluation boards are populated with a 100 uF 6.3V X5R output capacitor.
Locations for other output capacitors are provided.
C IN SELECTION
The LMZ14201 module contains an internal 0.47 μF input ceramic capacitor. Additional input capacitance is
required external to the module to handle the input ripple current of the application. This input capacitance should
be located in very close proximity to the module. Input capacitor selection is generally directed to satisfy the input
ripple current requirements rather than by capacitance value. Worst case input ripple current rating is dictated by
Equation 8 :
I(C IN(RMS) ) ? 1 /2 * I O * √ (D / 1-D)
(8)
where D ? V O / V IN
(As a point of reference, the worst case ripple current will occur when the module is presented with full load
current and when V IN = 2 * V O ).
Copyright ? 2010–2013, Texas Instruments Incorporated
Product Folder Links: LMZ14201
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